Open source · 3 November 2026
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QwenGPU presents Qwen3.5-2B compiled into 45 CUDA-capable GPU layers

qwenGPU compiles a 4-lane SIMT GPU into the Qwen3.5-2B model as 45 untrained layers, enabling the model to generate each step of real CUDA launches using Gated DeltaNet state as registers and memory.

Why it matters

QwenGPU’s ability to generate CUDA code from a 2 B model supports low-latency code-gen features.

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